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Embedded Series Product Guide

AIR-T Embedded Series

Table1: Embedded Series Part Numbers

AIR-T Model GPU FPGA Part Number
(Board Only)
Part Number
(with Enclosure)
AIR7101 NVIDIA Jetson TX2 Xilinx Artix7 75T AIR7101-A AIR7101-B
AIR7201 NVIDIA Jetson TX2 Xilinx Artix7 200T AIR7201-A AIR7201-B

Document Overview

This document lists the specifications for the Embedded Series Artificial Intelligence Radio Transceiver (AIR-T). Specifications are subject to change without notice. For the most recent device specifications, refer to http://docs.deepwavedigital.com.

Block Diagram

AIR-T Embedded Series Schematic

AIR-T Functional Block Diagram

AirStack Software

The AIR-T comes pre-loaded with a full software stack, AirStack. AirStack includes all the components necessary to utilize the AIR-T, such as an Ubuntu based operating system, AIR-T specific device drivers, and the FPGA firmware. The operating system is based off of NVIDIA JetPack SDK and is upgraded regularly. Please check for the latest software at www.deepwavedigital.com.

For a full description of the AirStack software guide, see our documentation page here.

AIR-T Embedded Series Enclosure

The AIR-T may be purchased with or without an enclosure. This documentation applies to both configurations.

AIR-T Enclosure

AIR-T Enclosure

Mechanical Drawing

We provide a pdf file with the mechanical dimensions of the AIR-T enclosure below.

AIR-T Mechanical Drawing

Processors

The Embedded Series AIR-T enables software defined radio for any signal processing application by utilizing three classes of tightly coupled processors:

  • FPGA for strict real-time operations
  • GPU for highly parallel processing and machine learning
  • CPU for control, I/O, DSP, and software applications

General Purpose Processors

The AIR-T uses the NVIDIA Jetson TX2 System On Module (SOM) as its General Purpose Processor (GPP). The Jetson TX2 SOM contains two ARM processors (6 cores total), an NVIDIA Pascal GPU (256 cores), and 8 GBytes of memory. The CPUs and GPU all share a common pool of memory, which (along with a unified memory architecture) allows for a zero-copy capability. As illustrated in the figure below, zero-copy eliminates the host-to-device (or device-to-host) memory transfer that is required by SDRs with discrete GPUs, such as an SDR connected to an external laptop or computer. Because of this, an SDR with a discrete GPU will have increased latency that is prohibitive for many applications. By utilizing this zero-copy architecture to remove extra data transfers, the AIR-T enables a wide range of low-latency SDR applications.

 

Comparison of a) traditional memory architecture with b) AIR-T unified memory architecture

 

For additional details on the NVIDIA Jetson TX2 please see the module datasheet URL below. Some of the information from that datasheet is reproduced below.

Jetson Modules Technical Specifications

 

Table2: General Purpose Processors

Parameter Value
Manufacturer NVIDIA Corporation
Model NVIDIA Jetson TX2 (GPU / CPU)
Packaging System on Module (SOM)
GPU Type NVIDIA Pascal GPU architecture with 256 NVIDIA CUDA cores
CPU Type ARMv8 (64-bit) heterogeneous multi-processing CPU architecture with two CPU clusters (6 processor cores) connected by a coherent interconnect fabric.

ARM Cortex -A57 MPCore (Quad-Core) Processor:
  • 2.0 GHz
  • L1 Cache: 48KB L1 instruction cache (I-cache) per core, 32KB L1 data cache (D-cache) per core
  • L2 Unified Cache: 2MB
NVIDIA Denver 2 (Dual-Core) Processor:
  • 2.0 GHz
  • L1 Cache: 128KB L1 instruction cache (I-cache) per core, 64KB L1 data cache (D-cache) per core
  • L2 Unified Cache: 2MB
Unified Memory
(GPU/CPU shared)
  • Capacity: 8 GB
  • Type: 128-bit (4ch x 32-bit) LPDDR4 Memory
  • Bus Frequency: 1866 MHz (59.7 GB/s)
Storage Capacity 32GB eMMC 5.1 Flash Storage

Reconfigurable FPGA

The FPGA on the Edge Series AIR-T comes pre-loaded with the AirStack firmware to support transmit and receive functionality at continuously variable sample rates. Customers may choose to load custom firmware if needed by their application and Deepwave will provide the FPGA interface documentation. The interface documentation includes the pin constraints file and a document that outlines the various interfaces for the FPGA so that customers may develop their own custom IP cores from scratch, i.e., without leveraging any of the AirStack software or driver infrastructure. If customers wish to leverage the AirStack software and driver infrastructure, they are encouraged to purchase a license to the AIR-T FPGA development kit, AirStack Sandbox.

The high-level details regarding the FPGA on the AIR-T are shown below.

Table 3: FPGA Options by Model Number

Parameter AIR7101 AIR7201
Manufacturer Xilinx Xilinx
Family Artix-7 Artix-7
Model XC7A75T-2FGG676C XC7A200T-2FBG676C
LUTs 75,520 215,360
DSP48E1 Slices 180 740
Embedded Block RAM 3.78 kbits 13.14 kbits
Default Time Base 62.5 MHz or 125 MHz 62.5 MHz or 125 MHz
Flash Memory (non-volatile) 256 Mbit 256 Mbit

Networking

Table 4: Networking Interfaces

Interface Description
Ethernet 10/100/1000 BASE-T, RJ-45 connector
WLAN IEEE 802.11a/b/g/n/ac dual-band 2x2 MIMO (Maximum transfer rate 866.7Mbps)
Bluetooth Version 4.1

External Display

Table 5: Display Interfaces

Interface Description
HDMI 2.0 a/b Up to 3840 x 2160 at 60Hz (4k)

Peripheral Interfaces

NVIDIA Jetson TX2

Table 6: NVIDIA Jetson Interfaces

Interface Description
SATA Version 3.1
SD Card SD 3.0 or SD-XC cards up to 2 TB
USB USB 3.0 Super Speed mode (up to 5Gb/s)
USB 2.0 High Speed mode (up to 480Mb/s), USB On-The-Go
UART See NVIDIA Jetson TX2 datasheet for information
GPIO See NVIDIA Jetson TX2 datasheet for information
SPI See NVIDIA Jetson TX2 datasheet for information
I2C See NVIDIA Jetson TX2 datasheet for information
Audio I2S or Digital. See NVIDIA Jetson TX2 datasheet for information

Xilinx FPGA

Table 7: FPGA Interfaces

Interface Description
JTAG Programmable via JTAG or Digilent USB to JTAG converter
XADC Integrated Analog with Digital Customization for the FPGA
Digital I/O GPIO, SPI
UART USB to UART bridge

Analog Devices 9371

Table 8: ADI9371 Interfaces

Interface Description
GPIO System monitoring and external attenuator control

Transceiver Specifications

The Radio Frequency Integrated Circuit (RFIC) on the AIR-T is the Analog Devices AD9371. This RFIC uses two local oscillators (LO): one for both transmit channels and one for both receive channels. This means that the transmitters and receivers may be tuned to different frequencies at the same time, but both transmit ports will always utilize the same common transmit frequency and both receive ports will always utilize the same common receive frequency.

In addition, the Embedded Series AIR-T contains internal clocking circuitry to allow it to operate either with an internally-generated clock or by phase locking to an external clock signal provided by the user. When an external clock is selected, the clock signal provided must be a 10 MHz reference signal with parameters defined in Table 13.

The user may also choose to provide an external local oscillator for the transmitter or the receiver. This may be useful in beamforming or direction finding applications. The specifications for the external LO are found in Table 14. Additionally, the functionality may be enabled by following the instructions in Using an External LO.

For additional details on the AD9371 please see that datasheet:

AD9371 Datasheet

Table 9: RF Integrated Circuit Information (AIR7101, AIR7201)

Parameter Value
Manufacturer Analog Devices
Model AD9371
Frequency Conversion Type Direct conversion

Table 10: Receiver Specifications by Model Number

Parameter AIR7101 AIR7201
Channels (Shared LO) 2 2
Sample Rates 7.8125 MSPS, 15.625 MSPS,
31.25 MSPS, 62.5 MSPS,
125 MSPS
3.906250 - 125 MSPS
Continuously variable
Maximum Bandwidth 100 MHz 100 MHz
Frequency Tuning Range 300 MHz to 6 GHz 300 MHz to 6 GHz
Gain +17 dB +17 dB
Tunable Attenuation 30 dB (0.5 dB increments) 30 dB (0.5 dB increments)
Power Level Control Automatic Gain Control,
Manual gain control
Automatic Gain Control,
Manual gain control
Maximum Input Power +15 dBm
(w/ 30 dB Attenuation or AGC)
+15 dBm
(w/ 30 dB Attenuation or AGC)
ADC Resolution 16 bits 16 bits
Built-in Calibrations Quadrature Error Correction,
DC offset correction
Quadrature Error Correction,
DC offset correction
Local Oscillator Internal (built-in) or external Internal (built-in) or external

Table 11: Transmitter Specifications by Model Number

Parameter AIR7101 AIR7201
Channels (Shared LO) 2 2
Sample Rates 7.8125 MSPS, 15.625 MSPS,
31.25 MSPS, 62.5 MSPS,
125 MSPS
3.906250 - 125 MSPS
Continuously variable
Maximum Bandwidth 100 MHz 100 MHz
Frequency Tuning Range 300 MHz to 6 GHz 300 MHz to 6 GHz
Maximum Output Power +6 dBm +6 dBm
Tunable Attenuation 42 dB (0.5 db increments) 42 dB (0.5 db increments)
Power Level Control Manual gain control Manual gain control
DAC Resolution 14 bits 14 bits
Built-in Calibrations Quadrature Error Correction,
LO leakage correction
Quadrature Error Correction,
LO leakage correction
Local Oscillator Internal, external Internal, external

Table 12: Internal Reference Clock (AIR7101, AIR7201)

Parameter Value
Clock distribution part number AD9528
Oscillator Type VCXO
Oscillator Model Crystek Corporation CVHD-950-125M
Oscillator Frequency 125 MHz
Frequency Pull Range ± 20 ppm

Table 13: External Reference Clock (AIR7101, AIR7201)

Parameter AIR7101-A, AIR7201-A AIR7101-B, AIR7201-B
Connector Type MCX SMA
Input Frequency 10 MHz 10 MHz
Input Voltage Rating 3.3V CMOS 3.3V CMOS
Abs Maximum Voltage (50 Ohm) 3.45 Volts 3.45 Volts

Table 14: External Local Oscillator

Parameter Value
LO Frequency 300 MHz to 4 GHz (600 MHz to 800 GHz input frequency)
Input Frequency 2x the desired LO frequency (e.g., 2 GHz input produces 1 GHz LO)
Signal Input Power 0 to +6 dBm

Additional information: Using an External LO

Note: All AIR-T models perform automatic calibrations when the radio starts and periodically during operation. These calibrations are outlined in Tables 10 and 11. When the radio is initialized, calibration signals may be emitted from both the TX and RX ports. To ensure that connected equipment is not damaged, it is recommended to disconnect the AIR-T from any equipment and terminate with a resistance of 50 Ohms during the radio initialization.

Power

Table: 15: Input Power

Parameter Value
Input Voltage Range 8-15 VDC
Typical Standby Power Consumption 9.3 W
Power Connector Barrel Plug, 2.5mm ID x 5.5mm OD x 11.0mm
Recommended Power Supply (included) 80 W, 12 VDC (MEAN WELL P/N GST90A12-P1M)

Mechanical

Table 16: Physical and Environmental Parameters

Parameter AIR7101-A, AIR7201-A AIR7101-B, AIR7201-B
Form Factor Mini-ITX Custom enclosure
Dimensions 170mm × 170mm x 35mm
(6.7" × 6.7" x 1.4")
210mm x 192mm x 75mm
(8.3" x 7.6" x 3.0"
Weight 0.35 kg (0.8 lbs) -
Operating Temperature Range -20°C – +70°C -20°C – +70°C

Proper Handling

The AIR7101-A and AIR7201-A are both exposed printed circuit boards with many exposed conductors. It is essential that no conductive material be left near or in contact with the system. Best practices include using an anti-static mat and other ESD procedures when handling sensitive electronic equipment, including low humidity and not exposing the radio to liquids.

Warranty

Deepwave Digital, Inc. warrants that the Product will be free from defects in material and workmanship for a period of 12 months from the date of Deepwave Digital's shipment of the Product to the Customer. See the full warranty information here.


Last update: May 10, 2022